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this document is a general product description and is subject to change without notice. hynix electronics does not assume any responsibility for use of circuits described. no patent licenses are implied. rev 02 / apr . 2001 hynix semiconductor GM76C256CW series 32kx8bit cmos sram document title 32k x8 bit 2.7~5.5v low power cmos slow sram revision history revision no history draft date remark 00 revision history insert jul.07.2000 final revised - datasheet format change - pdip package type insert - pin configuration change 01 m arking information add dec.04.2000 final revised - ac test condition add : 5pf test load - tclz value change : 15ns - > 10ns - tolz value change : 10ns - > 5ns 02 changed l ogo apr.30.2001 final - hyundai - > hynix
gm76c2 56cw series rev 02 / apr . 2001 2 description the GM76C256CW is a high - speed, low power and 32,786 x 8 - bits cmos static random access memory fabricated using hynix's high performance cmos process technology. it is suitable for use in low voltage operation and battery back - up application. this device has a data retention mode that guarantees data to remain valid at the minimum power supply voltage of 2.0 volt. features fully static operation and tri - state output ttl compatible inputs and outputs low power consumption battery backup(l/ll - part) - 2.0v(min.) data retention standard pin configuration - 28 pin 600mil pdip - 28 pin 330mil sop - 28 pin 8x13.4 mm tsop - i (standard) product voltage speed operation standby current(ua) temperature no. (v) (ns) current(ma) l ll ( c ) GM76C256CW 5.0 55/70 10 40 20 0~70(normal) 3.0 120/150 2 20 10 note 1. current value is max. pin connection 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 vcc /we a8 a9 a11 /oe a10 /cs i/o8 i/o7 i/o6 i/o5 i/o4 a14 a12 a7 a6 a5 a4 a3 a2 a1 a0 i/o1 i/o2 i/o3 vss a13 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 vcc /we a8 a9 a11 /oe a10 /cs i/o8 i/o7 i/o6 i/o5 i/o4 a14 a12 a7 a6 a5 a4 a3 a2 a1 a0 i/o1 i/o2 i/o3 vss a13 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 a10 /cs i/o7 i/o6 i/o5 i/o4 vss i/o3 i/o2 i/o1 a0 a1 a2 /oe a11 a9 a8 a13 /we vcc a14 a12 a7 a6 a5 a4 a3 i/o8 pdip sop tsop - i(standard) pin description block diagram pin name pin function /cs chip select /we write enable /oe output enable a0 ~ a14 address inputs i/o1 ~ i/o8 data input/output vcc power( + 5.0v) vss ground a14 column decoder a0 row decoder memory array 512x512 sense amp output buffer i/o1 i/o8 add input buffer /cs /oe /we write driver control logic
gm76c2 56cw series rev 02 / apr . 2001 2 ordering information part no. speed power temp package gm76c256cl - w 55/70 l - part 0 to 70 c pdip gm76c256cll - w 55/70 ll - part 0 to 70 c pdip gm76c256cl fw - w 5 5/70 l - part 0 to 70 c sop gm76c256cllfw - w 55/70 ll - part 0 to 70 c sop gm76c256clt - w 55/70 l - part 0 to 70 c tsop - i standard gm76c256cllt - w 55/70 ll - part 0 to 70 c tsop - i standard absolute maximum rating (1) symbol parameter rating unit vcc, v in, v out power supply, input/output voltage - 0.3 to 7.0 v t a operating temperature 0 to 70 c t stg storage temperature - 65 to 150 c p d power dissipation 1.0 w i out data output current 50 ma t solder lead soldering temperature & time 260 10 c sec note 1 . stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is stress rating only and the functional operation of the device under these or any other conditions above tho se indicated in the operation of this specification is not implied. exposure to the absolute maximum rating conditions for extended period may affect reliability. recommended dc operating conditions vcc = 5v vcc = 2.7 ~ 5.5v symbol parameter min. typ. max. min. typ. max. uni t vcc power supply voltage 4.5 5.0 5.5 2.7 3 .0 5.5 v vss ground 0 0 0 0 0 0 v v ih input high voltage 2.2 - vcc+0.3 2.2 - vcc+0.3 v v il input low voltage - 0.3 (1) - 0.8 - 0.3 (1) - 0.4 v note 1. v il = - 3.0v for pulse wid th less than 50ns truth table /cs /we /oe mode i/o operation h x x standby high - z l h h output disabled high - z l h l read data out l l x write data in note 1. h=v ih , l=v il , x=don't care
gm76c2 56cw series rev 02 / apr . 2001 3 dc characteristics vcc = 3v 10% , 5v 10%, t a = 0 c t o 70 c , unless otherwise specified. vcc = 3v ?? 10% vcc = 5v ?? 10% symbol parameter test condition min typ max min typ max unit i li input leakage current vss < v in < vcc - 1 - 1 - 1 - 1 ua i lo output leakage current vss < v out < vcc, /cs = v ih or / oe = v ih or /we = v il - 1 - 1 - 1 - 1 ua icc operating power supply current /cs = v il , v in = v ih or v il, i i/o = 0ma - 0.6 2 - 7 10 ma /cs = v il, i i/o = 0ma , min. duty cycle = 100%, v in = v ih or v il - - 30 - - 70 ma i cc1 average operating current /cs = v il, i i/o = 0ma, cycle = 1 us , v in = v ih or v il - - 5 - - 1 0 ma i sb ttl standby current (ttl inputs) /cs= v ih , v in = v ih or v il - - 0.3 - - 1 ma i sb1 cmos standby current /cs > vcc - 0.2v , l 20 - - 40 u a (cmos inputs) v in > vcc - 0.2v or v in < v ss +0.2v ll 10 - - 20 ua v ol output low voltage i ol = 2.1ma 0.4 - - 0.4 v v oh output high voltage i oh = - 1 .0 ma 2.2 2.4 - - v note : typical values are at vcc = 3.0v/ 5.0v, t a = 25 c ac characteristics(i) vcc = 3 v 10%, t a = 0 c to 70 c (normal) unless otherwise spec ified. - 55 - 70 min. max. min. max. 1 trc read cycle time 120 - 150 - ns 2 taa address access time - 120 - 150 ns 3 tacs chip select access time - 120 - 150 ns 4 toe output enable to output valid - 55 - 60 ns 5 tclz chip select to outp ut in low z 10 - 10 - ns 6 tolz output enable to output in low z 5 - 5 - ns 7 tchz chip disable to output in high z 0 40 0 50 ns 8 tohz out disable to output in high z 0 40 0 50 ns 9 toh output hold from address change 10 - 10 - ns 10 twc write cyc le time 120 - 150 - ns 11 tcw chip selection to end of write 100 - 120 - ns 12 taw address valid to end of write 100 - 120 - ns 13 tas address set - up time 0 - 0 - ns 14 twp write pulse width 65 - 70 - ns 15 twr write recovery time 0 - 0 - ns 16 twhz write to output in high z 0 40 0 50 ns 17 tdw data to write time overlap 40 - 5 0 - ns 18 tdh data hold from write time 0 - 0 - ns 19 tow output active from end of write 10 - 1 5 - ns read cycle write cycle symbol p arameter # unit
gm76c2 56cw series rev 02 / apr . 2001 4 ac characteristics( i i) vcc = 5v 10%, t a = 0 c to 70 c (normal) unless otherwise specified. - 55 - 70 min. max. min. max. 1 trc read cycle time 55 - 70 - ns 2 taa address access time - 55 - 70 ns 3 tacs chip select access time - 55 - 70 ns 4 toe output enable to output valid - 30 - 35 ns 5 tclz chip select to output in low z 10 - 10 - ns 6 tolz output enable to output in low z 5 - 5 - ns 7 tchz chip disable to output in high z 0 20 0 25 ns 8 tohz out disable to output in high z 0 20 0 25 ns 9 toh output hold from address change 5 - 10 - ns 10 twc write cycle time 55 - 70 - ns 11 tcw chip selection to end of write 50 - 65 - ns 12 taw address valid to end of write 50 - 60 - ns 13 tas address set - up time 0 - 0 - ns 14 twp write pulse width 45 - 50 - ns 15 twr write recovery time 0 - 0 - ns 16 twhz write to output in high z 0 20 0 25 ns 17 tdw data to write time overlap 25 - 3 0 - ns 18 tdh data hold from write time 0 - 0 - ns 19 tow output active from end of write 5 - 5 - ns ac test conditions t a = 0 c to 70 c (normal) unless otherwis e specified. parameter value input pulse level 5v 0.6v to 2.4v 3v 0.4v to 2.2v input rise and fall time 5ns input and output timing reference level 1.5v output load tclz,tolz,tchz,tohz,twhz,tow cl = 5 pf + 1ttl load others cl = 100pf + 1ttl load ac test loads cl(1) ttl note : including jig and scope capacitance capacitance t a = 25 c , f = 1.0mhz symbol parameter condition max. unit c in input capacitance v in = 0v 6 pf c i/o input /output capacitance v i/o = 0v 8 pf note : these parameters are sampled and not 100% tested read cycle write cycle symbol parameter # unit
gm76c2 56cw series rev 02 / apr . 2001 5 timing diagram read cycle 1 addr oe cs data out data valid trc tacs tclz toe tolz taa toh tohz tchz high-z note(read cycle): 1. t chz and t ohz are defined as the time at which the outputs achieve the open circuit conditions and arenot referenced to output voltage levels. 2. at any given temperature and voltage condition, t chz max. is less than t clz min. both for a given device and from device to device. 3. /we is high for the read cycle. read cycle 2 trc taa data valid previous data toh toh addr data out note(read cycle): 1. /we is high for the read cycle. 2. device is continuously selected /cs= v il. 3. /oe =v il .
gm76c2 56cw series rev 02 / apr . 2001 6 write cycle 1(/oe clocked) addr oe cs data out twc tdw tohz we data valid tdh twp tas data in twr tcw taw write cycle 2 (/oe low fixed) tdw twhz we data valid tdh twp tas data in twr tcw taw (7) (8) tow addr cs data out twc
gm76c2 56cw series rev 02 / apr . 2001 7 notes(write cycle): 1. a write occurs during the overlap of a low /cs and a low /we. a write begins at the latest transition among /cs going low and /we going low: a write ends at the earliest transition among /cs going high and /we going high. t wp is measured from the beginning of write to the end of write. 2. t cw is measured from the later of /cs going low to the end of write . 3. t as is measured from the address valid to the beginning of write. 4. t wr is measured from the end of write to the addr ess change. t wr is applied in case a write ends as /cs, or /we going high. 5. if /oe and /we are in the read mode during this period, and the i/o pins are in the output low - z state, input of opposite phase of the output must not be applied because bus contention can occur. 6. if /cs goes low simultaneously with /we going low, or after /we going low, the outputs remain in high impedance state. 7. d out is the same phase of the latest written data in this write cycle. 8. d out is the read data of the new address. d a ta retention characteristic ta =0 c to 70 c (normal) symbol parameter test condition min typ max unit v dr vcc for data retention cs > vcc - 0.2v, 2.0 - - v v in > vcc - 0.2v or v in < v ss +0.2v i ccdr data retention current vcc=3.0v, l - 1 50 ua /cs > vcc - 0.2v, ll - 0.5 10 ua v in > vcc - 0.2v or v in < v ss +0.2v tcdr chip deselect to data retention time see data retention 0 - - ns tr operating recovery time timing diagram trc (2) - - ns notes 1. typical values are under the condit ion of t a = 25 c . 2. trc is read cycle time. data retention timing diagram cs vdr cs>vcc-0.2v tcdr tr vss vcc 4.5v 2.2v data retention mode
gm76c2 56cw series rev 02 / apr . 2001 8 package information 28pin 600mil dual in - line package(blank) unit : inch(mm) min. max. 1.467(37.262) 1.447(36.754) 0.140(3.556) 0.120(3.048) 0.155(3.937) 0.145(3.683) 0.020(0.508) 0.021(0.533) 0.015(0.381) 0.100(2.54)bsc 0.065(1.650) 0.050(1.270) 0.090(2.286) 0.070(1.778) 0.014(0.356) 0.008(0.200) 0.600(15.240)bsc 0.550(13.970) 0.530(13.462) 0.035(0.889) 3 deg 11 deg 28pin 330mil small o utline p ackage(fw) unit : inch(mm) 0.346(8.788) 0.338(8.585) 0.480(12.192) 0.460(11.684) 0. 11 0(2. 794 ) 0.09 4 (2.388) 0.014(0.356) 0.002(0.051) 0.050(1.270)bsc 0.020(0.508) 0.014(0.356) 0.728(18.491) 0.720(18.288) 0.012(0.305) 0.008(0.203) 0.050(1.270) 0.030(0.762) max . min.
gm76c2 56cw series rev 02 / apr . 2001 9 28pin 8x13.4mm thin small outline package standard(t) 0.468(11.9) 0.460(11.7) 0.536(13.6) 0.520(13.2) 0.027(0.7) 0.012(0.3) 0.008(0.2) 0.004(0.1) 0.319(8.1) 0.311(7.9) 0.040(1.02) 0.036(0.91) 0.008(0.20) 0.002(0.05) 0.022(0.55 bsc) unit : inch(mm) max. min.
gm76c2 56cw series rev 02 / apr . 2001 10 marking information h y u n d a i g m 7 6 c 2 5 6 c c c - s s w y y w w k o r e a pdip package marking example index ? hyundai : hynix logo ? korea : origin country ? gm76c256c : part name ? cc : power consumption - l : low power - ll : low low power ? blank / fw / t : package type - blank : dip - fw : sop - t : tsop - i ? ss : speed - 55 : 55ns - 70 : 70ns ? w : wide voltage ? yy : year ( ex : 00 = year 2000, 01 = year 2001 ) ? ww : work week ( ex : 12 = ww12 ) note - capital letter : fixed item - small letter : non - fixed item tsop - i sop h y u n d a i g m 7 6 c 2 5 6 c c c f w s s y y w w k o r e a w h y u n d a i g m 7 6 c 2 5 6 c c c t s s w y y w w k o r e a h y u n d a i g m 7 6 c 2 5 6 c c c - s s w y y w w k o r e a pdip package marking example index ? hyundai : hynix logo ? korea : origin country ? gm76c256c : part name ? cc : power consumption - l : low power - ll : low low power ? blank / fw / t : package type - blank : dip - fw : sop - t : tsop - i ? ss : speed - 55 : 55ns - 70 : 70ns ? w : wide voltage ? yy : year ( ex : 00 = year 2000, 01 = year 2001 ) ? ww : work week ( ex : 12 = ww12 ) note - capital letter : fixed item - small letter : non - fixed item tsop - i sop h y u n d a i g m 7 6 c 2 5 6 c c c f w s s y y w w k o r e a w w h y u n d a i g m 7 6 c 2 5 6 c c c t s s w y y w w k o r e a h y u n d a i g m 7 6 c 2 5 6 c c c t s s w y y w w k o r e a

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